Technology Field
The disclosure relates to a data sampling circuit module, more particularly, to a data sampling circuit module, a data sampling method, and a memory storage device.
Description of Related Art
In general, some signals are transmitted in a form of differential signal in order to reduce power consumption. After a receiving end device receives a set of differential signals, the set of differential signals are recovered as a data stream. The data stream is composed of a series of pulses, and waveforms of the pulses are related to bit data to be transmitted. For example, a certain type of waveform represents a transmission bit data “1”, and another type of waveform represents a transmission bit data “0”.
Conventionally, in order to identify a waveform of each pulse in the data stream, the receiving end device samples the data stream in a great amount through a clock signal which has a very high clock frequency and re-builds the waveform of the pulse of the data stream through analyzing whether the sampled signal falls in a logic high or a logic low. However, such sampling method requires adoptions of clock signal having very high frequency, which consumes more power for the system and has poor efficiency.
Nothing herein should be construed as an admission of knowledge in the prior art of any portion of the present disclosure. Furthermore, citation or identification of any document in this application is not an admission that such document is available as prior art to the present disclosure, or that any reference forms a part of the common general knowledge in the art.